HJX-AD9361-X4 Phase synchronization platform is a SDR platform based on 4 pieces of AD9361, which can realize 8-channel RF signal acquisition. Phase synchronization requires the user to design the switching network of the RF front end and the related phase synchronization algorithm, which is very suitable for the application of matrix receiving system.
- FPGA chip: Xilinx Zynq XC7Z035-2FFG900I
- DDR chip: 512MB DDR3
- FLASH chip: 256Mb QSPI
- Number of sending and receiving channels: 8Tx, 8Rx
- RF Frequency range: 70MHz to 6GHz
- Digital interface: SFPx4
- Network port: 100/1000M
- Communication interface: RS232/JTAG/FPGA GP10
- Size :220mmx 100mm
- System reference clock: local TCXO/ external reference clock/Optical fiber recovery clock
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Xiamen Hejiaxing Electronics Co., Ltd. 閩ICP備05007801號-1